{"id":1213,"date":"2026-03-20T13:58:00","date_gmt":"2026-03-20T08:28:00","guid":{"rendered":"https:\/\/internshala.com\/competitions\/?p=1213"},"modified":"2026-03-20T13:58:01","modified_gmt":"2026-03-20T08:28:01","slug":"dvcon-india-design-contest-2026","status":"publish","type":"post","link":"https:\/\/internshala.com\/competitions\/dvcon-india-design-contest-2026\/","title":{"rendered":"DVCon India Design Contest 2026"},"content":{"rendered":"\n<p>\ud83d\udccc <strong>About the Event<\/strong><\/p>\n\n\n\n<p>The DVCon India Design Contest 2026, titled &#8220;VEGA Microprocessor (RISC-V) Based Design &amp; Verification Challenge,&#8221; presents unique opportunities for academic students to achieve deeper understanding of RISC-V architecture, indigenous VEGA Microprocessor, and explore the design and verification space for better performance.<\/p>\n\n\n\n<hr class=\"wp-block-separator has-text-color has-alpha-channel-opacity has-background is-style-default\" style=\"background-color:#f0f0f0;color:#f0f0f0\"\/>\n\n\n\n<p>\u2139\ufe0f <strong>Event Details<\/strong>Games for Change (G4C) Student Challenge 2026<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>Category:<\/strong> VLSI \/ Chip Design \/ Embedded Systems \/ Verification<\/li>\n\n\n\n<li><strong>Organizer:<\/strong> DVCon India in collaboration with C-DAC and IIT faculty<\/li>\n\n\n\n<li><strong>Eligibility:<\/strong> Engineering students from recognised colleges in India, bonafide certificate required<\/li>\n\n\n\n<li><strong>Team Size:<\/strong> Individual or small team (college students only)<\/li>\n\n\n\n<li><strong>Effort Level:<\/strong> Very High six stage competition<\/li>\n\n\n\n<li><strong>Submission Type:<\/strong> Multi-stage online, in person evaluation<\/li>\n<\/ul>\n\n\n\n<hr class=\"wp-block-separator has-text-color has-alpha-channel-opacity has-background is-style-default\" style=\"background-color:#f0f0f0;color:#f0f0f0\"\/>\n\n\n\n<p>\ud83d\udcc5 <strong>Important Dates<\/strong><\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>Idea Implementation:<\/strong> March 24 \u2013 April 27, 2026 <\/li>\n\n\n\n<li><strong>Results:<\/strong> May 11, 2026<\/li>\n\n\n\n<li><strong>Hardware Implementation:<\/strong> May 12 \u2013 June 29, 2026<\/li>\n\n\n\n<li><strong>FPGA Implementation:<\/strong> July 14 \u2013 August 28, 2026<\/li>\n\n\n\n<li><strong>In Person Final Evaluation:<\/strong> September 1 \u2013 2, 2026, Radisson Blu, Marathahalli, Bengaluru<\/li>\n\n\n\n<li><strong>Mode:<\/strong> (Hybrid) online stages, offline finale<\/li>\n<\/ul>\n\n\n\n<hr class=\"wp-block-separator has-text-color has-alpha-channel-opacity has-background is-style-default\" style=\"background-color:#f0f0f0;color:#f0f0f0\"\/>\n\n\n\n<p>\ud83c\udfc6 <strong>Prize Details and Value<\/strong><\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>Prize Type:<\/strong> Top three winners receive free registration to DVCon India 2026 and the opportunity to demonstrate their solution at DVCon India 2026 <\/li>\n\n\n\n<li><strong>Certificates:<\/strong> Yes, bonafide verified participation certificates<\/li>\n<\/ul>\n\n\n\n<hr class=\"wp-block-separator has-text-color has-alpha-channel-opacity has-background is-style-default\" style=\"background-color:#f0f0f0;color:#f0f0f0\"\/>\n\n\n\n<p>\ud83c\udfaf <strong>What You Will Do<\/strong><\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li>Design a system using the indigenous VEGA RISC-V microprocessor<\/li>\n\n\n\n<li>Submit detailed algorithm description and block diagram in Stage 1<\/li>\n\n\n\n<li>Implement and simulate your design in Stage 2<\/li>\n\n\n\n<li>Build a working hardware prototype in Stage 3A and FPGA implementation in Stage 3B<\/li>\n\n\n\n<li>Present your solution in-person at DVCon India 2026 in Bengaluru<\/li>\n<\/ul>\n\n\n\n<hr class=\"wp-block-separator has-text-color has-alpha-channel-opacity has-background is-style-default\" style=\"background-color:#f0f0f0;color:#f0f0f0\"\/>\n\n\n\n<p>\ud83d\udd17 <strong>Apply Here:<\/strong> <a href=\"https:\/\/dvcon-india.org\/invite-for-global-design-contest\/\">DVCon India Desi<\/a><a href=\"https:\/\/dvcon-india.org\/invite-for-global-design-contest\/\" target=\"_blank\" rel=\"noreferrer noopener nofollow\">gn Contest 2026<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"<p>\ud83d\udccc About the Event The DVCon India Design Contest 2026, titled &#8220;VEGA Microprocessor (RISC-V) Based Design &amp; Verification Challenge,&#8221; presents unique opportunities for academic students to achieve deeper understanding of<\/p>\n","protected":false},"author":9,"featured_media":1216,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[2],"tags":[],"class_list":["post-1213","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-contests"],"acf":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v26.9 - https:\/\/yoast.com\/product\/yoast-seo-wordpress\/ -->\n<title>DVCon India Design Contest 2026 | Internshala Competition<\/title>\n<meta name=\"description\" content=\"The DVCon India Design Contest 2026, presents unique opportunities for academic students to achieve deeper understanding of Design\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/internshala.com\/competitions\/dvcon-india-design-contest-2026\/\" \/>\n<meta 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