Only those candidates can apply who:
1. are available for full time (in-office) internship
2. can start the internship between 23rd Jan'22 and 27th Feb'22
3. are available for duration of 6 months
4. have relevant skills and interests
1. Pursuing or completed M.E./M. Tech in VLSI design with exposure to analog and/or digital circuits and tools or pursuing a VLSI course in CDAC
2. Excellent circuit design skills using discrete components - MOSFET/Bipolar
3. Hands-on experience in schematic capture and schematic simulation using Synopsys/Cadence/Open Source tools
4. Have excellent academic credentials
Stipend structure: This is a performance-based internship. In addition to the minimum-assured stipend, you will also be paid a performance-linked incentive (₹ 5000 per design).
OR