7th India ESD Workshop 2026
Indian Institute of Science, Bengaluru
📌About the Event
The 7th India ESD Workshop 2026, also known as InEW 2026, is a specialised semiconductor and VLSI event focused on electrostatic discharge protection, semiconductor reliability, chip design and testing. Hosted at the Indian Institute of Science, Bengaluru, the workshop will bring together students, researchers, faculty members, semiconductor professionals and international ESD experts for technical talks, poster presentations, panel discussions and industry interactions. The event aims to strengthen ESD knowledge and promote collaboration between academia and the semiconductor industry
ℹ️ Event Details
- Mode of conduct: Offline, in-person workshop
- Venue: Indian Institute of Science, Bengaluru, Karnataka
- Event dates: 7 and 8 September 2026
- Primary focus: Electrostatic discharge, semiconductor reliability, VLSI design, ESD testing and chip-protection technologies
- The programme is expected to include keynote talks, technical sessions, poster presentations, panel discussions, platform presentations and industry-focused sessions.
- Participants will get opportunities to interact with researchers, semiconductor engineers, academicians and global ESD specialists.
- Participants registering before the specified tutorial cut-off can access a 10–15-hour online pre-workshop tutorial on on-chip ESD design.
- Major technical areas include advanced CMOS, FinFETs, nanosheets, emerging semiconductor devices, 2.5D and 3D packaging, ESD testing, system-level ESD, numerical modelling, CAD verification, automotive electronics and GaN power devices.
📅 Important Dates
- Poster abstract submission deadline: 25 May 2026
- Poster acceptance notification: 31 May 2026
- Early-bird registration deadline: 1 August 2026
- Pre-workshop tutorial eligibility: Participants registering before 15 August 2026 can access the online tutorial.
- Late registration deadline: 5 September 2026
- Workshop dates: 7–8 September 2026
🎯 Eligibility & Rules
- The workshop is open to:
- Undergraduate and postgraduate students
- PhD scholars and research students
- Faculty members and academicians
- Semiconductor and VLSI professionals
- Researchers working in microelectronics, reliability and chip design
- Engineers from semiconductor companies and technology start-ups
- Separate registration categories are available for students and regular participants from industry or academia.
- Students, researchers and professionals were invited to submit poster abstracts.
- Poster submissions could cover:
- Work-in-progress research
- New ideas and methodologies
- Open research challenges
🏆 Benefits for the Participants
- Selected researchers receive an opportunity to present their work before experts from academia and the semiconductor industry.
- Poster presenters can gain research visibility and receive feedback from experienced ESD and semiconductor professionals.
- Participants can attend technical talks delivered by national and international experts.
- Registered participants may receive access to the 10–15-hour online tutorial on on-chip ESD design, subject to the registration cut-off.
- The workshop provides networking opportunities with semiconductor companies, researchers, professors and potential collaborators.
- Students can explore research opportunities in leading academic institutions and research and development laboratories.