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FPGA Design Engineer Job

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FPGA Design Engineer

UnivLabs

Start date

Starts Immediately

CTC (ANNUAL)

₹ 5,00,000 - 8,00,000 ₹ 5,00,000 - 8,00,000 /year

Experience

0-5 years

0-5 years experience

Apply By

21 Feb' 21

Posted 3 weeks ago

Job

373 applicants

About the job

Key responsibilities:

1. Writing RTL level code in an HDL language
2. Integrating IP on Vivado for Zync Ultrascale MPSOC

Skill(s) required

FPGA Synthesis and Prototyping

Earn certifications in these skills

Learn Arduino

Learn VLSI Design

Learn 3D Printing

Learn Advanced SOLIDWORKS

Learn Ansys

Learn CATIA

Learn AutoCAD 3D

Learn LabVIEW

Learn PLC Programming

Learn Engineering Drawing

Learn Fusion 360

Learn React

Learn Git & Github

Learn Deep Learning

Learn Data Structures & Algorithms

Learn SAS Programming

Learn AR/VR

Other requirements

Only a candidate who has executed some project on Vivado environment should apply

Salary

Annual CTC: ₹ 5,00,000 - 8,00,000 /year

Annual CTC breakup:

1. Fixed component: 80%

2. Variable component: 20%

Perks

Informal dress code 5 days a week Free snacks & beverages Health Insurance

Number of openings

About UnivLabs

Website

UnivLabs is one of the world's leading medical technology companies, which is driven to make healthcare better. We offer state-of-the-art electronic endoscope medical equipment which is reliable as well as affordable. Our devices and tools enable medical professionals around the world to deliver a better therapeutic outcome. At UnivLabs, we strive to be the most valuable partner to experts and customers with high aspirations through the timely provision of appropriate solutions that meet their high-level needs.

Activity on Internshala

Hiring since July 2016

112 opportunities posted

37 candidates hired