FPGA Design Engineer Job

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FPGA Design Engineer

Gurgaon

Start date
Starts Immediately
CTC (ANNUAL)
₹ 5,00,000 - 8,00,000 ₹ 5,00,000 - 8,00,000 /year
Experience
0-5 years
0-5 years experience
Apply By
21 Feb' 21
Posted 3 weeks ago
Job

About the job

Key responsibilities:

1. Writing RTL level code in an HDL language
2. Integrating IP on Vivado for Zync Ultrascale MPSOC

Skill(s) required

FPGA Synthesis and Prototyping

Other requirements

Only a candidate who has executed some project on Vivado environment should apply

Salary

Annual CTC: ₹ 5,00,000 - 8,00,000 /year

Annual CTC breakup:

1. Fixed component: 80%

2. Variable component: 20%

Perks

Informal dress code 5 days a week Free snacks & beverages Health Insurance

Number of openings

1

About UnivLabs

UnivLabs is one of the world's leading medical technology companies, which is driven to make healthcare better. We offer state-of-the-art electronic endoscope medical equipment which is reliable as well as affordable. Our devices and tools enable medical professionals around the world to deliver a better therapeutic outcome. At UnivLabs, we strive to be the most valuable partner to experts and customers with high aspirations through the timely provision of appropriate solutions that meet their high-level needs.
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