Knowledge of the complete characterization flows, library validation, QA checks and timing/ power characterization methodologies for standard cells.
Familiarity with Simulators (HSPICE, FineSim), understanding of schematic and parasitic extraction, liberty syntax requirements, CCS, statistical characterization, Verilog models, STA and power analysis tools.
Understanding of different EDA view for logic library like AOCV, POCV, LVF, EM etc.
Knowledge in scripting skills using TCL, Perl, Python, and knowledge on SNPS tools is a plus
1. Candidates with minimum 7 years of experience.
Annual CTC: ₹ 25,00,000 - 30,00,000 /year
Information above is Internshala's interpretation and paraphrasing of what we found on the shared link.
